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FDS2672 N-Channel UltraFET Trench(R) MOSFET
August 2006
FDS2672 N-Channel UltraFET Trench(R) MOSFET
200V, 3.9A, 70m
Features
Max rDS(on) = 70m at VGS = 10V, ID = 3.9A Max rDS(on) = 80m at VGS = 6V, ID = 3.5A Fast switching speed High performance trench technology for extremely low rDS(on) RoHS compliant
tm
General Description
This single N-Channel MOSFET is produced using Fairchild Semiconductor's advanced UItraFET Trench(R) process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance.
Application
DC-DC conversion
D SO-8
D
D
D
5 6 7 4 3 2 1
Pin 1
S
S
S
G
8
MOSFET Maximum Ratings TA = 25C unless otherwise noted
Symbol VDS VGS ID EAS PD TJ, TSTG Parameter Drain to Source Voltage Gate to Source Voltage Drain Current -Continuous -Pulsed Single Pulse Avalanche Energy Power Dissipation Power Dissipation Operating and Storage Temperature (Note 3) (Note 1a) (Note 1b) (Note 1a) Ratings 200 20 3.9 50 37.5 2.5 1.0 -55 to 150 Units V V A mJ W C
Thermal Characteristics
RJC RJA RJA Thermal Resistance, Junction to Case Thermal Resistance, Junction to Ambient Thermal Resistance, Junction to Ambient (Note 1) (Note 1a) (Note 1b) 25 50 125 C/W
Package Marking and Ordering Information
Device Marking FDS2672 Device FDS2672 Reel Size 13''
1
Tape Width 12mm
Quantity 2500 units
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(c)2006 Fairchild Semiconductor Corporation FDS2672 Rev. B
FDS2672 N-Channel UltraFET Trench(R) MOSFET
Electrical Characteristics TJ = 25C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS BVDSS TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = 250A, VGS = 0V ID = 250A, referenced to 25C VDS = 160V, VGS=0V VDS = 160V, VGS=0V TJ = 55C VGS = 20V 200 206 1 10 100 V mV/C A A nA
On Characteristics (Note 2)
VGS(th) VGS(th) TJ rDS(on) gFS Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient Drain to Source On Resistance Forward Transcondductance VGS = VDS, ID = 250A ID = 250A, referenced to 25C VGS = 10V, ID = 3.9A VGS = 6V, ID = 3.5A VGS = 10V, ID = 3.9A, TJ = 125C VDS = 10V,ID = 3.9A 2 2.9 -11 59 63 124 15 70 80 148 S m 4 V mV/C
Dynamic Characteristics
Ciss Coss Crss Rg Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance VDS = 100V, VGS = 0V, f = 1MHz f = 1MHz 1905 100 30 0.7 2535 135 45 pF pF pF
Switching Characteristics
td(on) tr td(off) tf Qg(TOT) Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge at 10V Gate to Source Gate Charge Gate to Drain "Miller"Charge VDD =100V ID = 3.9A VDD = 100V, ID = 3.9A VGS = 10V, RGEN = 6 22 10 35 10 33 11 7 35 20 56 20 46 ns ns ns ns nC nC nC
Drain-Source Diode Characteristics
VSD trr Qrr Source to Drain Diode Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0V, IS = 3.9A IF = 3.9A, di/dt = 100A/s IF = 3.9A, di/dt = 100A/s 0.75 67 179 1.2 101 269 V ns nC
Notes: 1: RJA is the sum of the junction-to-case and case-to- ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design.
a) 50C/W (10 sec) 62.5C/W steady state when mounted on a 1in2 pad of 2 oz copper
b) 125C/W when mounted on a minimum pad .
Scale 1:1 on letter size paper 2: Pulse Test: Pulse Width < 300 us, Duty Cycle < 2.0%. 3: Starting TJ = 25C, L = 3mH, IAS = 5A, VDD = 100V, VGS = 10V
FDS2672 Rev. B
2
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FDS2672 N-Channel UltraFET Trench(R) MOSFET
Typical Characteristics TJ = 25C unless otherwise noted
50 40
VGS = 6V VGS = 10V
NORMALIZED DRAIN TO SOURCE ON-RESISTANCE
PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX
3.0
PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX
ID, DRAIN CURRENT (A)
2.5 2.0 1.5 1.0 0.5
VGS = 4.5V VGS = 5V VGS = 6V
30
VGS = 5V
20 10 0
VGS = 4.5V
VGS = 10V
0
1 2 3 VDS, DRAIN TO SOURCE VOLTAGE (V)
4
0
5
10
15
20
25
30
35
40
45
50
ID, DRAIN CURRENT(A)
Figure 1. On Region Characteristics
Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage
180
rDS(on), DRAIN TO SOURCE ON-RESISTANCE (m)
NORMALIZED DRAIN TO SOURCE ON-RESISTANCE
2.8
ID = 3.9A VGS = 10V
160 140 120 100 80 60 40 3.0
ID = 3.9A PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX
2.2
TJ = 150oC
1.6
1.0
TJ = 25oC
0.4 -50
-25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (oC)
150
4.5
6.0
7.5
9.0
10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance vs Junction Temperature
30
Figure 4. On-Resistance vs Gate to Source Voltage
100
IS, REVERSE DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
25 20 15 10 5 0
PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX
VGS = 0V
VDD = 10V TJ = 150oC TJ = 25oC
10 1 0.1 0.01 1E-3 0.0
TJ = 150oC TJ = 25oC
TJ = - 55oC
TJ = -55oC
2
3 4 5 VGS, GATE TO SOURCE VOLTAGE (V)
6
0.2 0.4 0.6 0.8 1.0 VSD, BODY DIODE FORWARD VOLTAGE (V)
1.2
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward Voltage vs Source Current
3 www.fairchildsemi.com
FDS2672 Rev. B
FDS2672 N-Channel UltraFET Trench(R) MOSFET
Typical Characteristics TJ = 25C unless otherwise noted
VGS, GATE TO SOURCE VOLTAGE(V)
10 8 6
VDD = 150V VDD = 50V VDD = 100V
10000
Ciss
f = 1MHz VGS = 0V
CAPACITANCE (pF)
1000
Coss
4 2 0
100
Crss
0
8
16 24 Qg, GATE CHARGE(nC)
32
40
10 0.1
1 10 VDS, DRAIN TO SOURCE VOLTAGE (V)
100
Figure 7. Gate Charge Characteristics
10
IAS, AVALANCHE CURRENT(A)
Figure 8. Capacitance vs Drain to Source Voltage
4.0 ID, DRAIN CURRENT (A) 3.5 3.0 2.5 2.0 1.5 1.0 0.5
RJA = 50 C/W
o
TJ = 25oC
VGS = 10V VGS = 6V
1
TJ = 125oC
0.1 0.01
0.1 1 10 100 tAV, TIME IN AVALANCHE(ms)
1000
0.0 25
50
75
100
o
125
150
TA, AMBIENT TEMPERATURE ( C)
Figure 9. Unclamped Inductive Switching Capability
10
2
Figure 10. Ambient Continuous Drain Current vs Case Temperature
P(PK), PEAK TRANSIENT POWER (W)
3000 1000
VGS = 10V
ID, DRAIN CURRENT (A)
TA = 25oC
10 10
1
FOR TEMPERATURES ABOVE 25oC DERATE PEAK 150 - TA ----------------------125
100us
0
1ms
LIMITED BY PACKAGE SINGLE PULSE TJ = MAX RATED TA = 25OC
100
I = I25
10 10
-1
10ms 100ms 1s DC
10
SINGLE PULSE
-2
10
-3
OPERATION IN THIS AREA MAY BE LIMITED BY rDS(on)
0.01
0.1
1
10
100
1000
1 -4 10
10
-3
VDS, DRAIN-SOURCE VOLTAGE (V)
10 10 10 10 t, PULSE WIDTH (s)
-2
-1
0
1
10
2
10
3
Figure 11. Forward Bias Safe Operating Area
Figure 12. Single Pulse Maximum Power Dissipation
FDS2672 Rev. B
4
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FDS2672 N-Channel UltraFET Trench(R) MOSFET
Typical Characteristics TJ = 25C unless otherwise noted
2 1
DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01
NORMALIZED THERMAL IMPEDANCE, ZJA
0.1
0.01
PDM
t1 t2
1E-3
SINGLE PULSE
NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJA x RJA + TA
1E-4 -4 10
10
-3
10
-2
10
-1
10
0
10
1
10
2
10
3
t, RECTANGULAR PULSE DURATION (s)
Figure 13. Transient Thermal Response Curve
Thermal characterization performed using the conditions described in Note 1b Transient thermal response will change depending on the circuit board design
FDS2672 Rev. B
5
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TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. FACT Quiet SeriesTM GlobalOptoisolatorTM GTOTM HiSeCTM I2CTM i-LoTM ImpliedDisconnectTM IntelliMAXTM ISOPLANARTM LittleFETTM MICROCOUPLERTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM Across the board. Around the world.TM The Power Franchise(R) Programmable Active DroopTM DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
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FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS Definition of Terms
Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
Rev. I20

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